Diploma Project Proposals

The DCAE department proposes the following undergraduate thesis subjects to be coordinated by members of our faculty. In order to subscribe, send an e-mail to the supervisor with a list of previous projects and knowledge.

 

DNA Alignment Algorithm Evaluation and Testing Environment

Supervisor: Radu Hobincu

Bio-informatics is a fast growing industry which is expected to increase exponentially in the following years. The problem of identifying organisms in DNA strings obtained from a DNA sequencing machine is solved by several open source tools that are used in laboratories and research centers around the world. Performing an exhaustive evaluation on these algorithms both in terms of speed and accuracy is useful in choosing the right software as well as guiding the development of new sequence alignment solutions. The proposal is to develop a software framework for automatic evaluation of DNA sequence alignment software, which includes benchmark strings as well as the capability to cross-reference alignment results with publicly available sequence alignment engines, such as BLAST.

Technologies Used: C/C++, GNU build tools (e.g., make), BLAST

Notes:

• Project organized in collaboration with Sagraea Biotech
• The project will be assigned to one student

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GNU Radio Offloading on an FPGA SIMD Accelerator (Connex Array)

Supervisors: Lucian Petrică, Alexandru Marțian (alexandru.martian@upb.ro)

Software-defined radio is the concept of performing the majority of radio-related signal processing on programmable systems, as opposed to analog, digital and mixed-signal processing which is prevalent in traditional radio implementations. GNU Radio is the most popular open-source library of SDR functions. Along with the Universal Software Radio Peripheral (USRP), GNURadio enables the rapid development and evaluation of radio communication systems. However, GNU Radio typically requires a high-performance processor to execute the computationally intensive SDR algorithms in real time. We propose to develop a library of FPGA-offloaded SDR functions which integrate with GNU Radio and which may be utilized in embedded CPU-FPGA systems, e.g., Xilinx Zynq. These functions will execute on the Connex Array, a FPGA SIMD accelerator which has been developed by the DCAE department of the Faculty of Electronics, and which is fully programmable, utilizing its macro assembler, OPINCAA. We target real-time execution of a GNURadio-implemented Wi-Fi physical interface at less than 1W of power consumption utilizing this approach.

Technologies Used: GNU Radio, C++, Python

Notes:

• The project will be assigned to one student

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Architecture Configurator for the Connex Array and OPINCAA

Supervisor: Lucian Petrică

The Connex Array is a SIMD coprocessor architecture which, in its current FPGA implementation, consists of 128 execution units capable of performing fast integer arithmetic. The Connex Array operates in a host-accelerator paradigm, alongside a dual-core Cortex-A9 processor, within a Xilinx Zynq EPP system-on-chip. The Connex Array is fully programmable through the use of its macro assembler, OPINCAA, which enables the creation of Connex-offloaded functions and data transfers between the host and the Connex Array. Soft (FPGA) coprocessors such as the Connex Array have been demonstrated to improve the speed and energy efficiency of various applications in signal processing and computer vision. The Connex Array currently utilizes a complex Instruction Set Architecture (ISA), but many applications in the embedded space require only a reduced set of instructions in order to perform their function. Eliminating unused functionality improves the top frequency and power efficiency of the coprocessor. We propose to augment the Connex FPGA coprocessor with a ISA configuration software which allows the selective removal of instructions from the ISA, according to a requirement generated from application profiling, while preserving the OPINCAA syntax and the general-purpose programmability of the coprocessor. The architecture configurator must be able to generate the hardware (HDL) parameters of the coprocessor, as well as configuration files for OPINCAA, such that the removed instructions are emulated in software. For ease of use, the configurator must be integrated in Xilinx EDK, a tool framework for generating embedded FPGA systems. A benchmark suite will be developed to demonstrate the functionality of the configurator.

Technologies Used: C++, Xilinx Embedded Development Kit

Notes:

• The project will be assigned to one student